Synopsys and TSMC certify digital and analog flows on A14 and add agentic design tools

Synopsys said it has certified digital and analog design flows on TSMC's A14 process, from implementation through signoff, and is adding agentic AI to analog, digital and multi-die design. New tools include an agentic chiplet floorplanning flow in 3DIC Compiler and LLM-assisted analysis in Fusion Compiler. The release also reported 64G UCIe tape-outs on 2nm and 3nm nodes, which keeps Synopsys tied to TSMC's leading-edge AI and packaging demand.

• Certified digital and analog flows on TSMC A14, implementation through signoff
• New agentic AI chiplet floorplan co-optimization flow in 3DIC Compiler
• 64G UCIe IP tape-outs on both 2nm and 3nm nodes
• Co-packaged optics design flow on TSMC COUPE technology